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ST72325J4B5 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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ST72325J4B5 Datasheet PDF : 193 Pages
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ST72325
12.12 10-BIT ADC CHARACTERISTICS
Subject to general operating conditions for VDD, fCPU, and TA unless otherwise specified.
Symbol
fADC
VAREF
VAIN
Ilkg
RAIN
CAIN
fAIN
CADC
tADC
tADC
Parameter
Conditions
ADC clock frequency
Analog reference voltage
Conversion voltage range 1)
0.7*VDD VAREF VDD
Positive input leakage current for analog
input
Negative input leakage current on ro-
bust analog pins
-40°CTA85°C range
Other TA ranges
VIN<VSS, | IIN |< 400µA
on adjacent robust ana-
log pin
External input impedance
External capacitor on analog input
Variation freq. of analog input signal
Internal sample and hold capacitor
Conversion time (Sample+Hold)
fCPU=8MHz, SPEED=0 fADC=2MHz
- No of sample capacitor loading cycles
- No. of Hold conversion cycles
Min
0.4
3.8
VSSA
Typ
Max
Unit
2
MHz
VDD
V
VAREF
±250
nA
±1
µA
5
6
µA
see
k
Figure 94 pF
and
Figure 95 Hz
12
pF
7.5
µs
4
11
1/fADC
Notes:
1. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k). Data
based on characterization results, not tested in production.
169/193

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