Preliminary Technical Data
ADSP-BF522/523/524/525/526/527
Table 40. Serial Ports — External Late Frame Sync
ADSP-BF522/524/526 ADSP-BF523/525/527
VDDEXT =
1.8 V
VDDEXT =
2.5/3.3 V
VDDEXT =
1.8 V
VDDEXT =
2.5/3.3 V
Parameter
Min Max Min Max Min Max Min Max Unit
Switching Characteristics
tDDTLFSE
Data Delay from Late External TFSx
10.0
10.0
12.0
10.0 ns
or External RFSx in multi-channel mode with MFD = 01, 2
tDTENLFSE
Data Enable from External RFSx in multi-channel mode 0.0
0.0
0.0
0.0
ns
with MFD = 01, 2
1 When in multi-channel mode, TFSx enable and TFSx valid follow tDTENLFSE and tDDTLFSE.
2 If external RFSx/TFSx setup to RSCLKx/TSCLKx > tSCLKE/2 then tDDTTE/I and tDTENE/I apply, otherwise tDDTLFSE and tDTENLFSE apply.
EXTERNAL RFSx IN MULTI-CHANNEL MODE WITH MCE = 1
DRIVE
SAMPLE
DRIVE
RSCLKx
tSFSE/I
tHOFSE/I
RFSx
tDTENLFSE
DTx
tDD TL F SE
1ST BIT
LATE EXTERNAL TFSx
DRIVE
SAMPLE
TSCLKx
tSFSE/I
DRIVE
tHOFSE/I
TFSx
DTx
tDDTLFSE
1ST BIT
Figure 25. Serial Ports — External Late Frame Sync
Rev. PrG | Page 51 of 80 | February 2009