AD9775EB View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9775EB Datasheet PDF : 48 Pages
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AD9775
The offset control defines a small current that can be added to
IOUTA or IOUTB (not both) on the IDAC and QDAC. The selec-
tion of which IOUT this offset current is directed toward is
programmable via Register 08h, Bit 7 (IDAC) and Register 0Ch,
Bit 7 (QDAC). Figure 8 shows the scale of the offset current
that can be added to one of the complementary outputs on the
IDAC and QDAC. Offset control can be used for suppression of
LO leakage resulting from modulation of dc signal components.
If the AD9775 is dc-coupled to an external modulator, this
feature can be used to cancel the output offset on the AD9775
as well as the input offset on the modulator. Figure 9 shows a
typical example of the effect that the offset control has on LO
suppression.
GAIN
CONTROL
REGISTERS
1.2VREF
REFIO
0.1F
FINE
GAIN
DAC
OFFSET
CONTROL OFFSET
REGISTERS DAC
FINE
GAIN
DAC
IDAC
COARSE COARSE
GAIN
GAIN
DAC
DAC
QDAC
IOUTA1
IOUTB1
IOUTA2
IOUTB2
FSADJ1
RSET1
FSADJ2
RSET2
GAIN
OFFSET
CONTROL
REGISTERS
OFFSET
DAC
CONTROL
REGISTERS
Figure 6. DAC Outputs, Reference Current Scaling, and
Gain/Offset Adjust
25
0
–0.5
1R MODE
–1.0
–1.5
2R MODE
–2.0
–2.5
–3.0
0
5
10
15
20
FINE GAIN REGISTER CODE – Assuming
RSET1, 2 = 1.9k⍀
Figure 7b. Fine Gain Effect on IFULLSCALE
In Figure 9, the negative scale represents an offset added to
IOUTB, while the positive scale represents an offset added to
IOUTA of the respective DAC. Offset Register 1 corresponds to
IDAC, while Offset Register 2 corresponds to QDAC. Figure 9
represents the AD9775 synthesizing a complex signal that is then
dc-coupled to an AD8345 quadrature modulator with an LO of
800 MHz. The dc-coupling allows the input offset of the
AD8345 to be calibrated out as well. The LO suppression at
the AD8345 output was optimized first by adjusting Offset
Register 1 in the AD9775. When an optimal point was found
(roughly Code 54), this code was held in Offset Register 1, and
Offset Register 2 was adjusted. The resulting LO suppression
is 70 dBFS. These are typical numbers and the specific code for
optimization will vary from part to part.
5
20
2R MODE
15
10
1R MODE
5
4
3
2R MODE
2
1R MODE
1
0
0
5
10
15
20
COARSE GAIN REGISTER CODE – Assuming
RSET1, 2 = 1.9k⍀
Figure 7a. Coarse Gain Effect on IFULLSCALE
0
0
200
400
600
800
1000
COARSE GAIN REGISTER CODE – Assuming
RSET1, 2 = 1.9k⍀
Figure 8. DAC Output Offset Current
REV. 0
–19–
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