STLC5464 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STLC5464

MULTI-HDLC WITH n x 64 SWITCHING MATRIX ASSOCIATED

STMicroelectronics 

STLC5464

I - PIN INFORMATION (continued)

I.2 - Pin Description (continued)

Pin N° Symbol

Type

Function

MICROPROCESSOR INTERFACE (continued)

100

D9

101

D10

102

D11

103

D12

104

D13

105

D14

106

D15

I/O Data bit 9 for µP if not multiplexed

I/O Data bit 10 for µP if not multiplexed

I/O Data bit 11 for µP if not multiplexed

I/O Data bit 12 for µP if not multiplexed

I/O Data bit 13 for µP if not multiplexed

I/O Data bit 14 for µP if not multiplexed

I/O Data bit 15 for µP if not multiplexed

MEMORY INTERFACE

109

TRI

I3

Token Ring Input (for use Multi-HDLCs in cascade)

110

TRO

O4 Token Ring Output (for use Multi-HDLCs in cascade)

111

NWE

O4T Write Enable for memory circuits

112

NOE

O4T Control Output Enable for memory circuits

113 NRAS0/NCE0 O4T Row Address Strobe Bank 0 / Chip Enable 0 for SRAM

114 NCAS0/NCE1 O4T Column Address Strobe Bank 0 / Chip Enable1 for SRAM

115 NRAS1/NCE2 O4T Row Address Strobe Bank 1 / Chip Enable 2 for SRAM

116 NCAS1/NCE3 O4T Column Address Strobe Bank 1 / Chip Enable 3 for SRAM

117 NRAS2/NCE4 O4T Row Address Strobe Bank 2 / Chip Enable 4 for SRAM

118

NCE5

O4T Chip Enable 5 for SRAM

119 NRAS3/NCE6 O4T Row Address Strobe Bank 3 / Chip Enable 6 for SRAM

120

NCE7

O4T Chip Enable 7 for SRAM

123

ADM0

O8T Address bit 0 for SRAM and DRAM

124

ADM1

O8T Address bit 1 for SRAM and DRAM

125

ADM2

O8T Address bit 2 for SRAM and DRAM

126

ADM3

O8T Address bit 3 for SRAM and DRAM

127

ADM4

O8T Address bit 4 for SRAM and DRAM

128

ADM5

O8T Address bit 5 for SRAM and DRAM

129

ADM6

O8T Address bit 6 for SRAM and DRAM

130

ADM7

O8T Address bit 7 for SRAM and DRAM

131

ADM8

O8T Address bit 8 for SRAM and DRAM

132

ADM9

O8T Address bit 9 for SRAM and DRAM

135

ADM10

O8T Address bit 10 for SRAM and DRAM

136

ADM11

O8T Address bit 11 for SRAM only

137

ADM12

O8T Address bit 12 for SRAM only

138

ADM13

O8T Address bit 13 for SRAM only

139

ADM14

O8T Address bit 14 for SRAM only

Type : I1 = Input TTL ;

I2 = I1 + Pull-up ;

O4 = Output CMOS 4mA ;

O4T = O4 + Tristate ;

O8D = Output CMOS 8mA, Open Drain ;

O8T = Output CMOS 8mA, Tristate

I3 = I1 + Hysteresis ;

I4 = I3 + Pull-up ;

O8 = Output CMOS 8mA, ”1” and ”0” at Low Impedance ;

O8DT = Output CMOS 8mA, Open Drain or Tristate ;

12/83

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