M25PE80-VMN6TP データシートの表示（PDF） - STMicroelectronics

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M25PE80-VMN6TP

8 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

M25PE80

Operating features

● The second Software Protected mode (SPM2) uses the Block Protect (BP2, BP1,

BP0, see Section 6.4.3) bits to allow part of the memory to be configured as read-only.

Table 4. Protected area sizes

Status Register

content

Memory content

BP2 BP1 BP0

bit bit bit

Protected area

Unprotected area

0 0 0 none

All sectors(1) (sixteen sectors: 0 to 15)

0 0 1 Upper sixteenth (Sector 15)

Lower fifteen-sixteenths (fifteen sectors:

0 to 14)

0

1

0

Upper eighth (two sectors: 14 and 15)

Lower seven-eighths (fourteen sectors:

0 to 13)

0

1

1

Upper quarter (four sectors: 12 to 15)

Lower three-quarters (twelve sectors: 0

to 11)

1 0 0 Upper half (eight sectors: 8 to 15)

Lower half (eight sectors: 0 to 7)

1 0 1 All sectors (sixteen sectors: 0 to 15) none

1 1 0 All sectors (sixteen sectors: 0 to 15) none

1 1 1 All sectors (sixteen sectors: 0 to 15) none

1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are

0.

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