M25PE80-VMN6TP データシートの表示（PDF） - STMicroelectronics

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M25PE80-VMN6TP

8 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout

STMicroelectronics 

Memory organization

5

Memory organization

M25PE80

The memory is organized as:

● 4096 pages (256 bytes each).

● 1,048,576 Bytes (8 bits each)

● 16 sectors (512 Kbits, 65536 bytes each)

● 256 subsectors (32 Kbits, 4096 bytes each)

Each page can be individually:

● programmed (bits are programmed from 1 to 0)

● erased (bits are erased from 0 to 1)

● written (bits are changed to either 0 or 1)

The device is Page, Sector or Bulk Erasable (bits are erased from 0 to 1).

Table 5. Memory organization

Sector Subsector Address Range

255

FF000h FFFFFh

15

240

F0000h F0FFFh

239

EF000h EFFFFh

14

224

E0000h E0FFFh

223

DF000h DFFFFh

13

208

D0000h D0FFFh

207

CF000h CFFFFh

12

192

C0000h C0FFFh

191

BF000h BFFFFh

11

176

B0000h B0FFFh

175

AF000h AFFFFh

10

160

A0000h A0FFFh

159

9F000h 9FFFFh

9

144

90000h 90FFFh

Sector Subsector

143

8

128

127

7

112

111

6

96

95

5

80

79

4

64

63

3

48

47

2

32

Address Range

8F000h 8FFFFh

80000h

7F000h

80FFFh

7FFFFh

70000h

6F000h

70FFFh

6FFFFh

60000h

5F000h

60FFFh

5FFFFh

50000h

4F000h

50FFFh

4FFFFh

40000h

3F000h

40FFFh

3FFFFh

30000h

2F000h

30FFFh

2FFFFh

20000h 20FFFh

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