PSD412A2-C-90UI 데이터 시트보기 (PDF) - STMicroelectronics
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PSD412A2-C-90UI Datasheet PDF : 123 Pages
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PSD4XX Family
Microcontroller Interface – AC/DC Parameters (ZPSD4XXV Versions)
(3.0 V ± 10%)
Port A Peripheral Data Mode Read Timing (3.0 V ± 10%)
Symbol
t AVQV (PA)
t SLQV (PA)
t RLQV (PA)
t DVQV (PA)
t QXRH (PA)
t RLRH (PA)
t RHQZ (PA)
Parameter
Address Valid to Data Valid
CS Valid to Data Valid
RD to Data Valid
Data In to Data Out Valid
RD Data Hold Time
RD Pulse Width
RD to Data High-Z
Conditions
(Note 3)
(Notes 1 and 4)
(Note 1)
(Note 1)
(Note 1)
-20
-25
ZPLD_TURBO
Min Max Min Max
OFF
Unit
95
120 Add 20
ns
100
120 Add 20
ns
50
90
0
ns
35
50
0
ns
0
0
0
ns
40
70
0
ns
35
60
0
ns
Port A Peripheral Data Mode Write Timing (3.0 V ± 10%)
Symbol
Parameter
Conditions
-20
-25
ZPLD_TURBO
Min Max Min Max
OFF
Unit
t WLQV (PA)
t DVQV (PA)
t WHQZ (PA)
WR to Data Propagation Delay
Data to Port A Data
Propagation Delay
WR Invalid to Port A Tri-state
(Note 2)
(Note 5)
(Note 2)
60
60
0
ns
40
50
0
ns
35
60
0
ns
NOTES: 1. RD timing has the same timing as PSEN, DS, LDS, UDS signals.
2. WR timing has the same timing as E, DS, LDS, UDS, WRL, WRH signals.
3. Any input used to select Port A Data Peripheral Mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
93
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