ML6461CS 데이터 시트보기 (PDF) - Micro Linear Corporation
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ML6461CS Datasheet PDF : 30 Pages
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ML6461
CLK
HSYNC
(input)
YCrCb
BL
BL
A
B
C
D
E
F
G
H
Beginning
of Horizontal
Blanking
P Clock Cycles
# of Clock Cycles, P
if SELCCIR = 1
If ANALOG_HBLANK = 0
244
If ANALOG_HBLANK = 1
252
if SELCCIR = 0
220
220
Selectable Delay Synchronization (SEL_HSYNC1, SEL_HSYNC0)
Value (SEL_HSYNC1, SEL_HSYNC0)
(0,0)
(0,1)
(1,0)
(1,1)
Bit
A
CB0
BL
BL
BL
B
Y0
CB0
BL
BL
C
CR0
Y0
CB0
BL
D
Y1
CR0
Y0
CB0
E
CB2
Y1
CR0
Y0
F
Y2
CB2
Y1
CR0
G
CR2
Y2
CB2
Y1
H
Y3
CR2
Y2
CB2
Figure 8. Pixel Synchronization. For External Mode, Active Edge at Beginning of Horizontal Blanking.
(HRESET_MODE = 0, SENSE_HSYNC = 0, BL = Blanked Pixel)
CLK
HSYNC
(input)
YCrCb
BL
BL
A
B
C
D
E
F
G
H
Beginning
of Horizontal
Blanking
P Clock Cycles
# of Clock Cycles, P
if SELCCIR = 1 if SELCCIR = 0
If ANALOG_HBLANK = 0
244
220
If ANALOG_HBLANK = 1
252
220
Selectable Delay Synchronization (SEL_HSYNC1, SEL_HSYNC0)
Value (SEL_HSYNC1, SEL_HSYNC0)
(0,0)
(0,1)
(1,0)
(1,1)
Bit
A
CB0
BL
BL
BL
B
Y0
CB0
BL
BL
C
CR0
Y0
CB0
BL
D
Y1
CR0
Y0
CB0
E
CB2
Y1
CR0
Y0
F
Y2
CB2
Y1
CR0
G
CR2
Y2
CB2
Y1
H
Y3
CR2
Y2
CB2
Figure 8a. Pixel Synchronization. For External Mode, Active Edge at Beginning of Horizontal Blanking.
(HRESET_MODE = 0, SENSE_HSYNC = 1, BL = Blanked Pixel)
16
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