STPCD01 查看數據表（PDF） - STMicroelectronics

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STPCD01

PC Compatible Embedded Microprocessor

STMicroelectronics 

3.1.4 HCLK PLL Strap register Index 5Fh

(HCLK_Strap)

Bits 5-0 of this register reflect the status of the

MD[26:21] & are used as follows:

Bit 5-3 These pins reflect the value sampled on

MD[26:24] pins respectively and control the Host

clock frequency synthesizer

STRAP OPTION

Bit 2- 0 Reserved

This register defaults to the values sampled on

above pins after reset.

These pin must not be pulled low for normal sys-

tem operation.

Strap Registers [43:27] are reserved.

Issue 1.7 - February 8, 2000

29/48

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