CL-PS7500FE 查看數據表（PDF） - Cirrus Logic
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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
22.2 DC Specifications — Digital Values
In the table below, VDD = 5.0 ± 0.25 V and TA = 0°C to 70°C, unless otherwise specified.
Symbol Parameter
40 MHz
MIN
MAX
56 MHz
MIN
MAX
Units Note
VD D
VI H C
VI L C
VI LT
VI H T
VI L S
VI H S
VO H C
VO L C
II L
II H
IO Z
CI N
IO H 1
IO L 1
IO H 2
IO L 2
IO H 3
IO L 3
VI H S T
VI L S T
ESD
Power Supply Voltage (TTL)
4.75
5.25
4.75
5.25
V
Input High Voltage (CMOS)
Input Low Voltage (CMOS)
Input Low Voltage (TTL)
0.8 VD D VD D + 5% VD D 0.8 VD D VD D + 5% VD D
V
a, b
−0.5
0.2 VD D
−0.5
0.2 VD D
V
a, b
0
0.8
0
0.8
V
a, c
Input High Voltage (TTL)
Input low voltage (SCHMITT)
2.2
VD D + 5% VD D
2.2
VD D + 5% VD D
V
a, c
0
0.8
0
0.8
V
a, d
Input high voltage (SCHMITT)
2.0
VD D + 5% VD D
2.0
VD D + 5% VD D
V
a, d
Output high voltage (CMOS)
VD D − 0.8
VD D − 0.8
V
a, e,f
Output low voltage (CMOS)
VS S + 0.8
VS S + 0.8
V
a, c, f
Input low current
−10
−10
µA
Input high current
Output leakage current
Input capacitance
10
10
µA
−10
10
−10
10
µA
c
10
10
pF
d
x1 Output high current
(Vout = VDD − 0.8 V)
4
x1 Output low current
(Vout = VDD + 0.8 V)
−4
x2 Output high current
(Vout = VDD − 0.8 V)
10
x2 Output low current
(Vout = VDD + 0.8 V)
−10
x3 Output high current
(Vout = VDD − 0.8 V)
20
x3 Output low current
(Vout = VDD + 0.8 V)
−20
IS input rising voltage threshold
3.53
IS input falling voltage threshold
1.05
HBM ESD
2
4
mA
−4
mA
10
mA
−10
mA
20
mA
−20
3.53
1.05
2
mA
V
d
V
d
kV
g
ICC
At maximum frequency
150
180
mA
a Voltages measured with respect to VSS.
b IC – CMOS inputs.
c IT – TTL inputs (includes BTZ, TOD, and IT pin types).
d IS – CMOS Schmitt inputs (includes ICS and CSOD pin types).
e OCZ – Output, CMOS levels, tristateable (includes OCZ, BTZ, TOD, and CSOD pin types).
f With 1×, 2×, 3× lead currents.
g This does not apply to the video and sound analog pins: VIREF, ROUT, GOUT, and BOUT.
June 1997
ADVANCE DATA BOOK v2.0
ELECTRICAL SPECIFICATIONS
197
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