CL-PS7500FE 查看數據表（PDF） - Cirrus Logic

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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

Appendix D

D.Expanding PC-Style I/O to 32 Bits

1. 32-Bit I/O

The CL-PS7500FE provides 16-bit I/O accesses as standard using the BD[15:0] port for all I/O types. The

PC-style I/O access, however, can be extended to allow full 32-bit access without any loss in access

speed by adding external 16-bit transceivers. The CL-PS7500FE provides all control signals required to

support these external devices.

During PC-style I/O write cycles, the I/O controller routes the lower, 16-bit half-word from the ARM pro-

cessor data bus onto BD[15:0] and drives the upper, 16-bit half-word onto D[31:16].

During read cycles, the ARM processor data bus is driven from two sources:

q the lower half-word from the data latched from BD[15:0]

q the upper half-word from D[31:16]

If the external devices that provide the upper half-word of data are not present or the I/O peripheral does

not support more than 16 bits, the software must ignore the upper half-word read back into the ARM pro-

cessor registers.

Figure D-1 on page 235 is an example of the system connections required to provide a full 32-bit I/O inter-

face.

234

June 1997

ADVANCE DATA BOOK v2.0

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