ST72E121J4D0 查看數據表（PDF） - STMicroelectronics

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ST72E121J4D0

8-BIT MCU WITH 8 TO 16K OTP/EPROM, 384 TO 512 BYTES RAM, WDG, SCI, SPI AND 2 TIMERS

STMicroelectronics 

ST72E121 ST72T121

I/O PORTS (Cont’d)

Table 10. Port Configuration

Port

Port A

Port B

Port C

Port D

Port E

Port F

Pin name

PA3

PA4:PA7

PB0:PB4

PC0:PC7

PD0:PD5

PE0:PE1

PF0:PF2

PF4, PF6, PF7

Input (DDR = 0)

OR = 0

OR = 1

floating*

pull-up with interrupt

Output (DDR = 1)

OR = 0

OR =1

open-drain

push-pull

floating*

true open drain, high sink capability

floating*

pull-up with interrupt open-drain

push-pull

floating*

pull-up

open-drain

push-pull

floating*

pull-up

open-drain

push-pull

floating*

pull-up

open-drain

push-pull

floating*

pull-up with interrupt open-drain

push-pull

floating*

pull-up

open-drain

push-pull

* Reset state (The bits corresponding to unavailable pins are forced to 1 by hardware, this affects the reset status value).

Warning: All bits of the DDR register which correspond to unconnected I/Os must be left at their reset value. They must

not be modified by the user otherwise a spurious interrupt may be generated.

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