ST72E121J4D0 查看數據表（PDF） - STMicroelectronics

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ST72E121J4D0

8-BIT MCU WITH 8 TO 16K OTP/EPROM, 384 TO 512 BYTES RAM, WDG, SCI, SPI AND 2 TIMERS

STMicroelectronics 

ST72E121 ST72T121

INSTRUCTION GROUPS (Cont’d)

Mnemo

Description

ADC

Add with Carry

ADD

Addition

AND

Logical And

BCP

Bit compare A, Memory

BRES Bit Reset

BSET Bit Set

BTJF Jump if bit is false (0)

BTJT Jump if bit is true (1)

CALL Call subroutine

CALLR Call subroutine relative

CLR

Clear

CP

Arithmetic Compare

CPL

One Complement

DEC

Decrement

HALT Halt

IRET Interrupt routine return

INC

Increment

JP

Absolute Jump

JRA

Jump relative always

JRT

Jump relative

JRF

Never jump

JRIH

Jump if ext. interrupt = 1

JRIL

Jump if ext. interrupt = 0

JRH

Jump if H = 1

JRNH Jump if H = 0

JRM

Jump if I = 1

JRNM Jump if I = 0

JRMI Jump if N = 1 (minus)

JRPL Jump if N = 0 (plus)

JREQ Jump if Z = 1 (equal)

JRNE Jump if Z = 0 (not equal)

JRC

Jump if C = 1

JRNC Jump if C = 0

JRULT Jump if C = 1

JRUGE Jump if C = 0

JRUGT Jump if (C + Z = 0)

Fun ction/Exa mple

A=A+M+ C

A=A+M

A=A.M

tst (A . M)

bres Byte, #3

bset Byte, #3

btjf Byte, #3, Jmp1

btjt Byte, #3, Jmp1

tst(Reg - M)

A = FFH-A

dec Y

Pop CC, A, X, PC

inc X

jp [TBL.w]

jrf *

H= 1?

H= 0?

I=1?

I=0?

N= 1?

N= 0?

Z =1 ?

Z =0 ?

C= 1?

C= 0?

Unsigned <

Jmp if unsigned >=

Unsigned >

Dst

A

A

A

A

M

M

M

M

reg, M

reg

reg, M

reg, M

reg, M

Src

M

M

M

M

M

H I NZC

H

NZC

H

NZC

NZ

NZ

C

C

01

NZC

NZ1

NZ

0

H I NZC

NZ

79/92

79

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