ST72E121J4D0 查看數據表（PDF） - STMicroelectronics
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ST72E121J4D0
STMicroelectronics
ST72E121J4D0 Datasheet PDF : 92 Pages
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ST72E121 ST72T121
6 ELECTRICAL CHARACTERISTICS
6.1 ABSOLUTE MAXIMUM RATINGS
This product contains devices to protect the inputs
against damage due to high static voltages, how-
ever it is advisable to take normal precaution to
avoid application of any voltage higher than the
specified maximum rated voltages.
For proper operation it is recommended that VI
and VO be higher than VSS and lower than VDD.
Reliability is enhanced if unused inputs are con-
nected to an appropriate logic voltage level (VDD
or VSS).
Power Considerations.The average chip-junc-
tion temperature, TJ, in Celsius can be obtained
from:
TJ= TA + PD x RthJA
Where: TA = Ambient Temperature.
RthJA = Package thermal resistance
(junction-to ambient).
PD = PINT + PPORT.
PINT = IDD x VDD (chip internal power).
PPORT =Port power dissipation
determined by the user)
Symbol
VDD
VDDA
VI
VAI
VO
IVDD
IVSS
TJ
TSTG
Parameter
Digital Supply Voltage
Analog Supply and Reference Voltage
Input Voltage
Analog Input Voltage (A/D Converter)
Output Voltage
Total Current into VDD (source)
Total Current out of VSS (sink)
Junction Temperature
Storage Temperature
Value
-0.3 to 6.0
VDD - 0.3 to VDD + 0.3
VSS - 0.3 to VDD + 0.3
VSS - 0.3 to VDD + 0.3
VSSA-0.3 to VDDA+0.3
VSS - 0.3 to VDD + 0.3
100
100
150
-60 to 150
Unit
V
V
V
V
V
mA
mA
°C
°C
Note: Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these conditions is not implied. Exposure to maximum
rating conditions for extended periods may affect device reliability.
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