ST72E121J4D0 查看數據表（PDF） - STMicroelectronics
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ST72E121J4D0
STMicroelectronics
ST72E121J4D0 Datasheet PDF : 92 Pages
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ST72E121 ST72T121
PERIPHERAL CHARACTERISTICS (Cont’d)
Measurement points are VOL, VOH, VIL and VIH in the SPI Timing Diagram
Figure 43. SPI Master Timing Diagram CPHA=0, CPOL=1
SS
(INPUT)
SCK
(OUTP UT)
MISO
(INPU T)
MOSI
(OUTPU T)
1
5
D7-IN
6
7
D7-OUT
10
11
13
4
D6-IN
D6-OUT
12
D0-IN
D0-OUT
VR000110
Figure 44. SPI Master Timing Diagram CPHA=1, CPOL=0
SS
(INPUT)
SCK
(OUTP UT)
MISO
(INPU T)
MOSI
(OUTPU T)
1
4
6
10
5
D7-OUT
7
D7-IN
11
13
D6-OUT
D6-IN
12
D0-OUT
D0-IN
VR000107
Figure 45. SPI Master Timing Diagram CPHA=1, CPOL=1
SS
(INPUT)
SCK
(OUTPUT)
MIS O
(IN PUT)
MOSI
(OUTPUT)
1
5
4
D7-IN
6
7
D7-OUT
10
11
12
D6-IN
D6-OUT
13
D0-IN
D0-OUT
VR000108
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