OR2T15B7BA352-DB 查看數據表（PDF） - Lattice Semiconductor

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OR2T15B7BA352-DB

ORCA® Series 2 Field-Programmable Gate Arrays

Lattice Semiconductor 

ORCA Series 2 FPGAs

Data Sheet

November 2006

Pin Information (continued)

for each available package, and Table 18B provides the

number of user I/Os available in the ORCA OR2TxxA

Package Compatibility

series. It should be noted that the number of user I/Os

available for the OR2TxxA series is reduced from the

The package pinouts are consistent across ORCA

equivalent OR2CxxA devices by the number of

Series FPGAs with the following exception: some user

I/O pins that do not have any special functions will

be converted to VDD5 pins for the OR2TxxA series.

If the designer does not use these pins for the

S OR2CxxA and OR2TxxB series, then pinout compati-

bility will be maintained between the ORCA OR2CxxA,

OR2TxxA, and OR2TxxB series of FPGAs. Note that

E they must be connected to a power supply for the

OR2TxxA series.

Package pinouts being consistent across all ORCA

IC Series FPGAs enables a designer to select a package

D based on I/O requirements and change the FPGA with-

out laying out the printed-circuit board again. The

change might be to a larger FPGA if additional func-

V E tionality is needed, or it might be to a smaller FPGA to

decrease unit cost.

E Table 18A provides the number of user I/Os available

U for the ORCA OR2CxxA and OR2TxxB Series FPGAs

required VDD5 pins, as shown in Table 18B. The pins

that are converted from user I/O to VDD5 are denoted

as I/O-VDD5 in the pin information tables (Table 19

through 28). Each package has six dedicated configu-

ration pins.

Table 19—Table 28. provide the package pin and pin

function for the ORCA Series 2 FPGAs and packages.

The bond pad name is identified in the PIC nomencla-

ture used in the ispLEVER design editor.

When the number of FPGA bond pads exceeds the

number of package pins, bond pads are unused. When

the number of package pins exceeds the number of

bond pads, package pins are left unconnected (no

connects). When a package pin is to be left as a no

connect for a specific die, it is indicated as a note in the

device pad column for the FPGA. The tables provide no

information on unused pads.

D Table 18A. ORCA OR2CxxA and OR2TxxB Series FPGA I/Os Summary

IN Device

84-Pin 100-Pin 144-Pin 160-Pin

PLCC TQFP TQFP QFP

T T OR2C04A

User I/Os

64

77

114

130

C VDD/VSS

14

17

24

24

N OR2C06A

User I/Os

—

77

114

130

E VDD/VSS

—

17

24

24

O OR2C08A

User I/Os

—

—

—

130

L VDD/VSS

—

—

—

24

E C OR2C10A

User I/Os

—

—

—

130

VDD/VSS

—

—

—

24

S IS OR2C12A

User I/Os

64

—

—

—

VDD/VSS

14

—

—

—

OR2C15A/OR2T15B

D User I/Os

64

—

—

—

208-Pin

SQFP/

SQFP2

160

31

171

31

171

31

171

31

171

31

171

240-Pin

SQFP/

SQFP2

—

—

192

42

192

40

—

—

192

42

192

256-Pin

PBGA

—

—

192

26

—

—

221

26

223

26

223

304-Pin

SQFP/

SQFP2

352-Pin

PBGA

432-Pin

EBGA

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

256

—

—

48

—

252

288

—

46

48

—

252

298

—

VDD/VSS

14

—

—

—

31

42

26

46

48

—

OR2C26A

User I/Os

—

—

—

—

171

192

—

252

—

—

VDD/VSS

—

—

—

—

31

42

—

46

—

—

OR2C40A/OR2T40B

User I/Os

—

—

—

—

171

192

—

252

—

—

VDD/VSS

—

—

—

—

31

42

—

46

—

—

70

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