AD5280BRU200 查看數據表（PDF） - Analog Devices
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AD5280BRU200 Datasheet PDF : 20 Pages
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AD5280/AD5282
Resistance Scaling
AD5280/AD5282 offers 20 kΩ, 50 kΩ, and 200 kΩ nominal
resistance. Users who need a lower resistance and the same
number of step adjustments can place multiple devices in paral-
lel. For example, Figure 23 shows a simple scheme of paralleling
both channels of the AD5282. To adjust half of the resistance
linearly per step, users need to program both channels to the
same settings.
VDD
A1
B1 W1
LD
A2
B2 W2
Figure 23. Reduce Resistance by Half with Linear
Adjustment Characteristics
Applicable only to the Voltage Divider Mode, by paralleling a
discrete resistor as shown in Figure 24, a proportionately lower
voltage appears at terminal A. This translates into a finer degree
of precision because the step size at terminal W will be smaller.
The voltage can be found as:
( ) VW
D
=
D
256
×
R3
VDD
+ RAB
// R2
× (RAB // R2) (18)
VDD
R3
A
R2 R1
W
B
0
Figure 24. Lowering the Nominal Resistance
Figures 23 and 24 show that the digital potentiometers change
steps linearly. On the other hand, log taper adjustment is usu-
ally preferred in applications like volume control. Figure 25
shows another way of resistance scaling. In this circuit, the
smaller the R2 with respect to RAB, the more the pseudo log
taper characteristic behaves.
Vi
A
R1 W
VO
B
R2
RDAC CIRCUIT SIMULATION MODEL
A
CA
25pF
RDAC
20k⍀
B
CB
25pF
CW
55pF
W
Figure 26. RDAC Circuit Simulation Model for
RDAC = 20 kΩ
The internal parasitic capacitances and the external capacitive
loads dominate the ac characteristics of the RDACs. Configured
as a potentiometer divider, the –3 dB bandwidth of the AD5280
(20 kΩ resistor) measures 310 kHz at half scale. TPC 19 pro-
vides the large signal BODE plot characteristics of the three
available resistor versions—20 kΩ, 50 kΩ, and 200 kΩ. A para-
sitic simulation model is shown in Figure 26. A macro model
net list for the 20 kΩ RDAC is provided.
Macro Model Net List for RDAC
.PARAM D=256, RDAC=20E3
*
.SUBCKT DPOT (A,W,B)
*
CA
A
0
25E-12
RWA A
W
{(1-D/256)*RDAC+60}
CW W
0
55E-12
RWB W
B
{D/256*RDAC+60}
CB
B
0
25E-12
*
.ENDS DPOT
Figure 25. Resistor Scaling with Log Adjustment
Characteristics
–18–
REV. 0
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