C8051F38B-GMR 查看數據表（PDF） - Silicon Laboratories

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C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

Table 21.1. Endpoint Addressing Scheme

Endpoint

Endpoint0

Endpoint1

Endpoint2

Endpoint3

Associated Pipes

Endpoint0 IN

Endpoint0 OUT

Endpoint1 IN

Endpoint1 OUT

Endpoint2 IN

Endpoint2 OUT

Endpoint3 IN

Endpoint3 OUT

USB Protocol Address

0x00

0x00

0x81

0x01

0x82

0x02

0x83

0x03

21.2. USB Transceiver

The USB Transceiver is configured via the USB0XCN register shown in SFR Definition 21.1. This configu-

ration includes Transceiver enable/disable, pull-up resistor enable/disable, and device speed selection

(Full or Low Speed). When bit SPEED = 1, USB0 operates as a Full Speed USB function, and the on-chip

pull-up resistor (if enabled) appears on the D+ pin. When bit SPEED = 0, USB0 operates as a Low Speed

USB function, and the on-chip pull-up resistor (if enabled) appears on the D- pin. Bits4-0 of register

USB0XCN can be used for Transceiver testing as described in SFR Definition 21.1. The pull-up resistor is

enabled only when VBUS is present (see Section “9.1.2. VBUS Detection” on page 74 for details on VBUS

detection).

Important Note: The USB clock should be active before the Transceiver is enabled.

Rev. 1.4

173

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