MT90866 查看數據表（PDF） - Zarlink Semiconductor Inc
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产品描述 (功能)
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MT90866
Zarlink Semiconductor Inc
MT90866 Datasheet PDF : 86 Pages
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MT90866
Data Sheet
FRAME_A_io
FRAME_B_io
(Input)
C8_A_io
C8_B_io
(Input)
STi (8 Mb/s)
Local input
STi (4 Mb/s)
Local input
STi (2 Mb/s)
Local input
Bit 1
Ch 0
tSAMP8
Bit 0
Ch 0
tSIS8
tSIH8
Bit 7
Ch 0
Bit 6
Ch 0
Bit 5
Ch 0
Bit 4
Ch 0
tSAMP4
Bit 0
Ch63
tSAMP2
Bit 0
Ch31
tSIS4
Bit 7
Ch 0
tSIH4
Bit 6
Ch 0
tSIS2
Bit 7
Ch 0
tSIH2
Figure 40 - Local Serial Stream Input Timing
Bit 3
Ch 0
VTT
VTT
VTT
AC Electrical Characteristics† - Local and Backplane Tristate Timing
Characteristic
Sym.
Min. Typ.‡
Max.
Units Test Conditions
1 STo/STio Delay - Active to High-Z
- High-Z to Active
2.048 Mb/s (local)
4.096 Mb/s (local)
8.192 Mb/s (local)
8.192 Mb/s (backplane)
16.384 Mb/s (backplane)
tDZ, tZD
-12-∆
-12-∆
-12-∆
-1-∆
-1-∆
3.5-∆
3.5-∆
3.5-∆
7+∆
7+∆
ns RL=1K, CL=30pF,
ns See Note 1.
ns
ns
ns
2 Output Driver Enable (ODE) Delay
- High-Z to Active
2.048 Mb/s (local)
4.096 Mb/s (local)
8.192 Mb/s (local)
8.192 Mb/s (backplane)
16.384 Mb/s (backplane)
tZD_ODE
37
ns
37
ns
37
ns
20
ns
20
ns
2 Output Driver Disable (ODE) Delay
- Active to High-Z
2.048 Mb/s (local)
4.096 Mb/s (local)
8.192 Mb/s (local)
8.192 Mb/s (backplane)
16.384 Mb/s (backplane)
tDZ_ODE
20
ns
20
ns
20
ns
20
ns
20
ns
† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* Note 1: High Impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel the time taken to discharge CL.
80
Zarlink Semiconductor Inc.
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