PIC12F/LF1822/16F/LF1823
TABLE 23-3: SUMMARY OF REGISTERS ASSOCIATED WITH COMPARE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CCP1CON
P1M<1:0>
DC1B<1:0>
CCP1M<3:0>
CCPR1L Capture/Compare/PWM Register 1 Low Byte (LSB)
CCPR1H Capture/Compare/PWM Register 1 High Byte (MSB)
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
PIE1
PIE2
PIR1
PIR2
T1CON
TMR1GIE ADIE
OSFIE
C2IE(1)
TMR1GIF ADIF
OSFIF
C2IF(1)
TMR1CS<1:0>
RCIE
TXIE
C1IE
EEIE
RCIF
TXIF
C1IF
EEIF
T1CKPS<1:0>
SSP1IE
BCL1IE
SSP1IF
BCL1IF
T1OSCEN
CCP1IE
—
CCP1IF
—
T1SYNC
TMR2IE
—
TMR2IF
—
—
TMR1IE
—
TMR1IF
—
TMR1ON
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/DONE T1GVAL
T1GSS<1:0>
TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TRISA
—
TRISC(1)
—
—
TRISA5 TRISA4
TRISA3
TRISA2 TRISA1 TRISA0
—
TRISC5 TRISC4
TRISC3
TRISC2 TRISC1 TRISC0
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Compare mode.
Note 1: PIC16F/LF1823 only.
Register
on Page
221
200
200
89
90
91
92
93
180
181
172
172
121
125
2010 Microchip Technology Inc.
Preliminary
DS41413A-page 203