PIC12F/LF1822/16F/LF1823
REGISTER 23-4: PSTR1CON: PWM STEERING CONTROL REGISTER(1)
U-0
—
bit 7
U-0
U-0
R/W-0/0
R/W-0/0
R/W-0/0
—
—
STR1SYNC STR1D
STR1C
R/W-0/0
STR1B
R/W-1/1
STR1A
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
STR1SYNC: Steering Sync bit
1 = Output steering update occurs on next PWM period
0 = Output steering update occurs at the beginning of the instruction cycle boundary
STR1D: Steering Enable bit D(2)
1 = P1D pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1D pin is assigned to port pin
STR1C: Steering Enable bit C(2)
1 = P1C pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1C pin is assigned to port pin
STR1B: Steering Enable bit B
1 = P1B pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1B pin is assigned to port pin
STR1A: Steering Enable bit A
1 = P1A pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1A pin is assigned to port pin
Note 1: The PWM Steering mode is available only when the CCP1CON register bits CCP1M<3:2> = 11 and
P1M<1:0> = 00.
2: PIC16F/LF1823 only.
DS41413A-page 224
Preliminary
2010 Microchip Technology Inc.