PIC16F688-E/SL 查看數據表（PDF） - Microchip Technology
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PIC16F688-E/SL
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PIC16F688-E/SL Datasheet PDF : 202 Pages
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PIC16F688
4.0 I/O PORTS
There are as many as twelve general purpose I/O pins
available. Depending on which peripherals are enabled,
some or all of the pins may not be available as general
purpose I/O. In general, when a peripheral is enabled,
the associated pin may not be used as a general
purpose I/O pin.
4.1 PORTA and the TRISA Registers
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA. Setting
a TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISA bit (= 0)
will make the corresponding PORTA pin an output (i.e.,
put the contents of the output latch on the selected pin).
The exception is RA3, which is input only and its TRISA
bit will always read as ‘1’. Example 4-1 shows how to
initialize PORTA.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the PORT latch.
All write operations are read-modify-write operations.
REGISTER 4-1: PORTA: PORTA REGISTER
U-0
—
bit 7
U-0
R/W-x
R/W-0
—
RA5
RA4
Therefore, a write to a port implies that the port pins are
read, this value is modified and then written to the
PORT data latch. RA3 reads ‘0’ when MCLRE = 1.
The TRISA register controls the direction of the
PORTA pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISA
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
Note:
The ANSEL and CMCON0 registers must
be initialized to configure an analog
channel as a digital input. Pins configured
as analog inputs will read ‘0’.
EXAMPLE 4-1:
BANKSEL PORTA
CLRF PORTA
MOVLW 07h
MOVWF CMCON0
BANKSEL ANSEL
CLRF ANSEL
MOVLW 0Ch
MOVWF TRISA
INITIALIZING PORTA
;
;Init PORTA
;Set RA<2:0> to
;digital I/O
;
;digital I/O
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
R-x
R/W-0
R/W-0
R/W-0
RA3
RA2
RA1
RA0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
RA<5:0>: PORTA I/O Pin bit
1 = Port pin is > VIH
0 = Port pin is < VIL
REGISTER 4-2: TRISA: PORTA TRI-STATE REGISTER
U-0
—
bit 7
U-0
R/W-1
R/W-1
R-1
—
TRISA5
TRISA4
TRISA3
R/W-1
TRISA2
R/W-1
TRISA1
R/W-1
TRISA0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-0
Note 1:
2:
Unimplemented: Read as ‘0’
TRISA<5:0>: PORTA Tri-State Control bits
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
TRISA<3> always reads ‘1’.
TRISA<5:4> always reads ‘1’ in XT, HS and LP Oscillator modes.
© 2007 Microchip Technology Inc.
DS41203C-page 33
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