PIC16F688-E/SL 查看數據表（PDF） - Microchip Technology
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PIC16F688-E/SL
Microchip Technology
PIC16F688-E/SL Datasheet PDF : 202 Pages
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PIC16F688
REGISTER 4-4: WPUA: WEAK PULL-UP PORTA REGISTER
U-0
—
bit 7
U-0
R/W-1
R/W-1
U-0
R/W-1
—
WPUA5
WPUA4
—
WPUA2
R/W-1
WPUA1
R/W-1
WPUA0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
bit 3
bit 2-0
Unimplemented: Read as ‘0’
WPUA<5:4>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPUA<2:0>: Weak Pull-up Control bits
1 = Pull-up enabled
0 = Pull-up disabled
Note 1:
2:
3:
4:
Global RAPU must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISA = 0).
The RA3 pull-up is enabled when configured as MCLR and disabled as an I/O in the Configuration Word.
WPUA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.
REGISTER 4-5: IOCA: INTERRUPT-ON-CHANGE PORTA REGISTER
U-0
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
IOCA5
IOCA4
IOCA3
IOCA2
R/W-0
IOCA1
R/W-0
IOCA0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
IOCA<5:0>: Interrupt-on-change PORTA Control bits
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Note 1: Global Interrupt Enable (GIE) must be enabled for individual interrupts to be recognized.
2: IOCA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.
© 2007 Microchip Technology Inc.
DS41203C-page 35
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