ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
Table 30 shows the event control selected by the
ZVD and CPB bits. In most cases, the D and Z
events have opposite edge polarity, so the ZVD bit
is usually 0.
Table 30. ZVD and CPB Edge Selection Bits
ZVD bit
CPB bit
Event generation vs input data sampled
DWF
ZWF
ZEF
0
0
DEF
C
DH
Z
DWF
ZWF
ZEF
0
1
DEF
C
DH
Z
DWF
ZWF
ZEF
1
0
DEF
C
DH
Z
DWF
ZWF
ZEF
1
1
DEF
C
DH
Z
Note: The ZVD bit is located in the MPOL register, the CPB bit is in the MCRB register.
Legend:
DWF= D window filter
DEF= D event filter
ZWF = Z window filter
ZEF = Z event filter
Refer also to Table 34 on page 162.
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