STA321MPL 查看數據表（PDF） - STMicroelectronics
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STA321MPL Datasheet PDF : 50 Pages
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STA321MP
Registers
7.2.26 Channel input mapping channels 1 and 2 (0x1B)
7.2.27
D7
D6
D5
D4
C2IM2
0
C2IM1
0
C2IM0
1
D3
D2
C1IM2
0
Channel input mapping channels 3 and 4 (0x1C)
D1
C1IM1
0
D0
C1IM0
0
7.2.28
D7
D6
D5
D4
C4IM2
0
C4IM1
1
C4IM0
1
D3
D2
C3IM2
0
Channel input mapping channels 5 and 6 (0x1D)
D1
C3IM1
1
D0
C3IM0
0
7.2.29
D7
D6
D5
D4
C6IM2
C6IM1
C6IM0
1
0
1
D3
D2
C5IM2
1
Channel input mapping channels 7 and 8 (0x1E)
D1
C5IM1
0
D0
C5IM0
0
D7
D6
D5
D4
D3
D2
D1
D0
C8IM2
1
C8M1
1
C8IM0
1
C7IM2
1
C7IM1
1
C7IM0
0
Each channel received via I2S can be mapped to any internal processing channel via the
channel input mapping registers. This allows for flexibility in processing, simplifies output
stage designs, and enables the ability to perform crossovers. The default settings of these
registers map each I2S input channel to its corresponding processing channel.
CnIM[2:0]
000
001
010
011
100
101
110
111
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
Serial input from
Doc ID 022647 Rev 1
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