CSR8635 查看數據表（PDF） - CSR plc

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CSR8635

The CSR8635 QFN single-chip Bluetooth® audio ROM device targets mid-range stereo speakers and headsets.

CSR plc 

3 Clock Generation

CSR8635 QFN accepts a reference clock input from either a crystal or an external clock source, e.g. a TCXO.

The external reference clock is required in active and deep sleep modes and must be present when CSR8635 QFN is

enabled.

3.1 Crystal

CSR8635 QFN contains a crystal driver circuit that acts as a transconductance amplifier that drives an external crystal

connected between XTAL_IN and XTAL_OUT. The crystal driver circuit forms a Pierce oscillator with the external

crystal. External capacitors are not required for standard crystals that require a load capacitance of around 9pF.

CSR recommends this option.

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XTAL_IN

(Typical)

15.6 pF 10.8 pF 6.0 pF

1.1 pF

15.6 pF 10.8 pF 6.0 pF

1.1 pF

XTAL_OUT 20.8 pF

(Typical)

16.0 pF

11.2 pF

6.4 pF

16.0 pF 11.2 pF 6.4 pF

1.5 pF

Table 3.1: Typical On-chip Capacitance Values

The drive strength is configured with PSKEY_XTAL_LVL. The default level for this PS Key is sufficient for typical

crystals. The level control is set in the range 0 to 15, where 15 is the maximum drive level.

Increasing the crystal amplifier drive level increases the transconductance of the crystal amplifier, which creates an

increase in the oscillator margin (ratio of oscillator amplifiers is equivalent to the negative resistance of the crystal

ESR).

Production Information

© Cambridge Silicon Radio Limited 2013

Confidential Information - This Material is Subject to CSR's Non-disclosure Agreement

Page 24 of 105

CS-303725-DSP5

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