TABLE 10-1: TIMER2/3 REGISTER MAP
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7
Bit 6
Bit 5
Bit 4
TMR2
0106
Timer2 Register
TMR3HLD 0108
Timer3 Holding Register (for 32-bit timer operations only)
TMR3
010A
Timer3 Register
PR2
010C
Period Register 2
PR3
010E
Period Register 3
T2CON
0110 TON
— TSIDL —
—
—
—
—
—
TGATE TCKPS1 TCKPS0
T3CON
0112 TON
— TSIDL —
—
—
—
—
—
TGATE TCKPS1 TCKPS0
Legend: u = uninitialized bit; — = unimplemented bit, read as ‘0’
Note:
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Bit 3
T32
—
Bit 2 Bit 1
—
TCS
—
TCS
Bit 0
—
—
Reset State
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
1111 1111 1111 1111
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000