TABLE 12-1: OUTPUT COMPARE REGISTER MAP
SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5
OC1RS
OC1R
OC1CON
OC2RS
OC2R
OC2CON
Legend:
Note:
0180
Output Compare 1 Secondary Register
0182
Output Compare 1 Main Register
0184 —
— OCSIDL —
—
—
—
—
—
—
—
0186
Output Compare 2 Secondary Register
0188
Output Compare 2 Main Register
018A —
— OCSIDL —
—
—
—
—
—
—
—
— = unimplemented bit, read as ‘0’
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Bit 4
Bit 3
OCFLT OCTSEL
OCFLT OCTSEL
Bit 2 Bit 1 Bit 0
OCM<2:0>
OCM<2:0>
Reset State
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000