CDB8952T-IQ 查看數據表（PDF） - Cirrus Logic
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CDB8952T-IQ Datasheet PDF : 86 Pages
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CS8952T
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
Basic Mode Control Register - Address 00h (Cont.)
BIT
NAME
9
Restart Auto-Neg
8
Duplex Mode
7
Collision Test
6:0 Reserved
TYPE
Read/Set
R/W
R/W
Read Only
RESET
DESCRIPTION
0
Setting this bit causes auto-negotiation to be
restarted. It is an Act-Once bit which is cleared once
auto-negotiation has begun. Clearing this bit has no
effect on the auto-negotiation process.
If auto-negotiation When bit 12 is clear, this bit controls the Full-
is enabled via the Duplex/Half-Duplex operation of the part. When set,
AN[1:0] pins, reset the part is configured for Full-Duplex operation, and
to 0; otherwise, when clear the part is configured for Half Duplex
reset to 1
operation. The setting of this bit is superseded by
auto-negotiation, and thus has no effect if bit 12 is
set.
0
When set, the COL pin will be asserted within 10 bit
times in response to the assertion of TX_EN. Upon
the deassertion of TX_EN, COL will be deasserted
within 4 bit times. When Collision Test is clear, COL
functions normally.
000 0000
CIRRUS LOGIC ADVANCED PRODUCT DATABOOK
32
DS206TPP2
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