CL-PS7500FE View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

Big Endian

In the big endian scheme, the most-significant byte of a word is stored at the lowest-numbered byte, and

the least-significant byte is stored at the highest-numbered byte.

Byte 0 of the memory system should therefore be connected to D[31:24] (data lines 31 through 24).

Load and store are the only instructions affected by the endianism.

HIGHER

ADDRESS

LOWER

ADDRESS

Big Endian

31

24 23

16 15

87

0

8

9

10

11

4

5

6

7

0

1

2

3

WORD

ADDRESS

8

4

0

q Most-significant byte is at lowest address

q Word is addressed by byte address of most-significant byte

Figure 7-2. Big Endian Addresses of Bytes within Words

7.1.2 Configuration Bits for Backward Compatibility

Two register bits, PROG32 and DATA32, select one of three processor configurations:

1) 26-bit program and data space

PROG32 LOW, DATA32 LOW

This configuration forces the ARM processor to operate like the earlier ARM processors with 26-bit address

space. The programmer’s model for these processors applies, but the new instructions to access the CPSR and

SPSR registers operate as detailed in the CL-PS7500FE Programmer’s Guide. In this configuration, it is impos-

sible to select a 32-bit operating mode, and all exceptions (including address exceptions) enter the exception

handler in the appropriate 26-bit mode.

2) 26-bit program space and 32-bit data space

PROG32 LOW, DATA32 HIGH

This is the same as the 26-bit program and data space configuration, but with address exceptions disabled to

allow data transfer operations to access the full 32-bit address space.

3) 32-bit program and data space

PROG32 HIGH, DATA32 HIGH

This configuration extends the address space to 32 bits, introduces major changes in the programmer’s model

and provides support for running existing 26-bit programs in the 32-bit environment.

NOTE: Do not select the fourth processor configuration, 26-bit data space and 32-bit program space.

June 1997

ADVANCE DATA BOOK v2.0

53

REGISTER DESCRIPTIONS

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