MC80F0804D View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
MC80F0804D Datasheet PDF : 120 Pages
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MC80F0704/0708/0804/0808
ADCM
R/W R/W R/W R/W R/W R/W R/W R
7
6
5
4
3
2
1
0
ADEN ADCK ADS3 ADS2 BATDCSL1 ADS0 ADST ADSF
ADDRESS: 0EFH
INITIAL VALUE: 0000 0001B
ADCRH
WWW
-
-
-
7
6
5
4
3
2
PSSEL1 PSSEL0 ADC8 - BTC- L -
A/D status bit
0: A/D conversion is in progress
1: A/D conversion is completed
A/D start bit
Setting this bit starts an A/D conversion.
After one cycle, bit is cleared to “0” by hardware.
Analog input channel select
0000: Channel 0 (AN0) 0110: Channel 6 (AN6)
0001: Channel 1 (AN1) 0111: Channel 7 (AN7)
0010: Channel 2 (AN2) 1000: Channel 8 (AN8)
0011: Channel 3 (AN3) 1001: Channel 9 (AN9)
0100: Channel 4 (AN4) 1010: Channel 10 (AN10)
0101: Channel 5 (AN5) 1011: Channel 11 (AN11)
1100: Channel 12 (AN12)
1101: Channel 13 (AN13)
1110: Channel 14 (AN14)
1111: Channel 15 (AN15)
A/D converter Clock Source Divide Ratio Selection bit
0: Clock Source fPS
1: Clock Source fPS ÷ 2
A/D converter Enable bit
~ 1101: Not available
0: A/D converter module turn off and current is not flow.
1: Enable A/D converter
RR
1
0
ADDRESS: 0F0H
INITIAL VALUE: 010- ----B
ADCRL
A/D Conversion High Data
ADC 8-bit Mode select bit
0: 10-bit Mode
1: 8-bit Mode
A/D Conversion Clock (fPS) Source Selection
00: fXIN ÷ 4
01: fXIN ÷ 8
10: fXIN ÷ 16
11: fXIN ÷ 32
R
R
R
R
R
R
R
R
7
6
5
4
3
2
1
0
BTCL
ADDRESS: 0F1H
INITIAL VALUE: Undefined
A/D Conversion Low Data
ADCK
0
0
0
0
1
1
1
1
PSSEL1
0
0
0
0
1
1
1
1
PSSEL0
0
1
0
1
0
1
0
1
PS Clock Selection
PS = fXIN ÷ 4
PS = fXIN ÷ 8
PS = fXIN ÷ 16
PS = fXIN ÷ 32
PS = fXIN ÷ 64
PS = fXIN ÷ 128
PS = fXIN ÷ 256
PS = fXIN ÷ 512
PS : Conversion Clock
Figure 14-4 A/D Converter Control & Result Register
72
October 31, 2011 Ver 1.03
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