MC80F0804D View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
MC80F0804D Datasheet PDF : 120 Pages
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MC80F0704/0708/0804/0808
Note: The MC80F0708 and HMS87C1416B is similar in
function, but the interrupt processing method is different.
When replacing the HMS87C1416B to MC80F0708, clear-
ing interrupt request flag should be added.
Example: Clearing Interrupt Request Flag
T1_INT:
CLR1 T1IF ;CLEAR T1 REQUEST
interrupt processing
RETI
;RETURN
Saving/Restoring General-purpose Register
During interrupt acceptance processing, the program counter and
the program status word are automatically saved on the stack, but
accumulator and other registers are not saved itself. These regis-
ters are saved by the software if necessary. Also, when multiple
interrupt services are nested, it is necessary to avoid using the
same data memory area for saving registers.
The following method is used to save/restore the general-purpose
registers.
Example: Register save using push and pop instructions
INTxx: CLR1
PUSH
PUSH
PUSH
INTxxIF
A
X
Y
;CLEAR REQUEST.
;SAVE ACC.
;SAVE X REG.
;SAVE Y REG.
interrupt processing
POP
Y
POP
X
POP
A
RETI
;RESTORE Y REG.
;RESTORE X REG.
;RESTORE ACC.
;RETURN
General-purpose register save/restore using push and pop instruc-
tions;
17.2 BRK Interrupt
Software interrupt can be invoked by BRK instruction, which has
the lowest priority order.
Interrupt vector address of BRK is shared with the vector of
TCALL 0 (Refer to Program Memory Section). When BRK inter-
rupt is generated, B-flag of PSW is set to distinguish BRK from
TCALL 0.
Each processing step is determined by B-flag as shown in Figure
17-5 .
BRK or
TCALL0
B-FLAG
=1
BRK
INTERRUPT
ROUTINE
=0
TCALL0
ROUTINE
RETI
RET
17.3 Multi Interrupt
If two requests of different priority levels are received simulta-
neously, the request of higher priority level is serviced. If re-
quests of the interrupt are received at the same time
simultaneously, an internal polling sequence determines by hard-
Figure 17-5 Execution of BRK/TCALL0
ware which request is serviced. However, multiple processing
through software for special features is possible. Generally when
an interrupt is accepted, the I-flag is cleared to disable any further
interrupt. But as user sets I-flag in interrupt routine, some further
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