FDC37B80X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37B80X
SMSC -> Microchip
FDC37B80X Datasheet PDF : 194 Pages
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FIGURE 15B - EPP 1.7 DATA OR ADDRESS READ CYCLE PARAMETERS
NAME
DESCRIPTION
t2 nIOR Deasserted to Command Deasserted
t3 nWAIT Asserted to IOCHRDY Deasserted
t4 Command Deasserted to PDATA Hi-Z
t5 Command Asserted to PDATA Valid
t8 nIOR Asserted to IOCHRDY Asserted
t10 nWAIT Deasserted to IOCHRDY Deasserted
t11 IOCHRDY Deasserted to nIOR Deasserted
t12 nIOR Deasserted to SDATA High-Z (Hold Time)
t13 PDATA Valid to SDATA Valid
t15 Time Out
t19 Ax Valid to nIOR Asserted
t20 nIOR Deasserted to Ax Invalid
t21 Command Deasserted to nWAIT Deasserted
t22 nIOR Deasserted to nIOW or nIOR Asserted
t23 nIOR Asserted to Command Asserted
MIN TYP MAX UNITS
50
ns
0
40
ns
0
ns
0
ns
24
ns
50
ns
0
ns
0
40
ns
40
ns
10
12
µs
40
ns
10
ns
0
ns
40
ns
55
ns
Note: WRITE is controlled by setting the PDIR bit to "1" in the control register before performing an
EPP Read.
183
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