PIC18F8520-IPT301 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F8520-IPT301

64/80-Pin High-Performance, 256 Kbit to 1 MbitEnhanced Flash Microcontrollers with A/D

Microchip Technology 

PIC18F6520/8520/6620/8620/6720/8720

IORLW

Inclusive OR literal with W

Syntax:

[ label ] IORLW k

Operands:

0  k  255

Operation:

(W) .OR. k  W

Status Affected: N, Z

Encoding:

0000 1001 kkkk kkkk

Description:

The contents of W are OR’ed with

the eight-bit literal ‘k’. The result is

placed in W.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Decode

Q2

Read

literal ‘k’

Q3

Process

Data

Q4

Write to W

Example:

IORLW

Before Instruction

W

= 0x9A

After Instruction

W

= 0xBF

0x35

IORWF

Inclusive OR W with f

Syntax:

Operands:

Operation:

[ label ] IORWF f [,d [,a]

0  f  255

d  [0,1]

a  [0,1]

(W) .OR. (f)  dest

Status Affected:

Encoding:

Description:

N, Z

0001 00da ffff ffff

Inclusive OR W with register ‘f’. If

‘d’ is ‘0’, the result is placed in W. If

‘d’ is ‘1’, the result is placed back in

register ‘f’ (default). If ‘a’ is ‘0’, the

Access Bank will be selected, over-

riding the BSR value. If ‘a’ = 1, then

the bank will be selected as per the

BSR value (default).

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Decode

Read

register ‘f’

Q3

Process

Data

Q4

Write to

destination

Example:

IORWF RESULT, 0, 1

Before Instruction

RESULT = 0x13

W

= 0x91

After Instruction

RESULT = 0x13

W

= 0x93

DS39609C-page 282

 2003-2013 Microchip Technology Inc.

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