PIC18F8520-IPT301 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F8520-IPT301

64/80-Pin High-Performance, 256 Kbit to 1 MbitEnhanced Flash Microcontrollers with A/D

Microchip Technology 

PIC18F6520/8520/6620/8620/6720/8720

RCALL

Relative Call

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

[ label ] RCALL n

-1024  n  1023

(PC) + 2  TOS,

(PC) + 2 + 2n  PC

None

1101 1nnn nnnn nnnn

Subroutine call with a jump up to

1K from the current location. First,

return address (PC+2) is pushed

onto the stack. Then, add the 2’s

complement number ‘2n’ to the PC.

Since the PC will have incremented

to fetch the next instruction, the

new address will be PC+2+2n. This

instruction is a two-cycle

instruction.

Words:

1

Cycles:

2

Q Cycle Activity:

Q1

Q2

Decode

Read literal

‘n’

Push PC to

stack

No

operation

No

operation

Q3

Process

Data

No

operation

Q4

Write to PC

No

operation

Example:

HERE

RCALL Jump

Before Instruction

PC = Address (HERE)

After Instruction

PC = Address (Jump)

TOS = Address (HERE+2)

RESET

Reset

Syntax:

[ label ] RESET

Operands:

None

Operation:

Reset all registers and flags that

are affected by a MCLR Reset.

Status Affected: All

Encoding:

0000 0000 1111 1111

Description:

This instruction provides a way to

execute a MCLR Reset in software.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Decode

Q2

Start

Reset

Q3

No

operation

Q4

No

operation

Example:

RESET

After Instruction

Registers = Reset Value

Flags* = Reset Value

 2003-2013 Microchip Technology Inc.

DS39609C-page 289

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