PIC18F8520-IPT301 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18F8520-IPT301

64/80-Pin High-Performance, 256 Kbit to 1 MbitEnhanced Flash Microcontrollers with A/D

Microchip Technology 

PIC18F6520/8520/6620/8620/6720/8720

NEGF

Negate f

Syntax:

[ label ] NEGF f [,a]

Operands:

0  f  255

a  [0,1]

Operation:

(f)+1f

Status Affected: N, OV, C, DC, Z

Encoding:

0110 110a ffff ffff

Description:

Location ‘f’ is negated using two’s

complement. The result is placed in

the data memory location ‘f’. If ‘a’ is

‘0’, the Access Bank will be

selected, overriding the BSR value.

If ‘a’ = 1, then the bank will be

selected as per the BSR value.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode

Read

register ‘f’

Process

Data

Write

register ‘f’

Example:

NEGF REG, 1

Before Instruction

REG = 0011 1010 [0x3A]

After Instruction

REG = 1100 0110 [0xC6]

NOP

No Operation

Syntax:

[ label ] NOP

Operands:

None

Operation:

No operation

Status Affected: None

Encoding:

0000

1111

0000

xxxx

0000

xxxx

0000

xxxx

Description:

No operation.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Decode

No

operation

Q3

No

operation

Q4

No

operation

Example:

None.

 2003-2013 Microchip Technology Inc.

DS39609C-page 287

Share Link: