ST10F163 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST10F163

16-BIT MCU WITH 128KBYTE FLASH MEMORY

STMicroelectronics 

ST10F163

VIII - INTERRUPT SYSTEM

With an interrupt response time from 200 ns to

480ns (in the case of internal program execution),

the ST10F163 reacts quickly to the occurrence of

non-deterministic events.

The architecture of the ST10F163 supports sev-

eral mechanisms for fast and flexible response to

service requests that can be generated from vari-

ous sources internal or external to the microcon-

troller. Any of these interrupt requests can be

programmed to being serviced by the Interrupt

Controller or by the Peripheral Event Controller

(PEC). In a standard interrupt service, program

execution is suspended and a branch to the inter-

rupt vector table is performed. For a PEC service,

just one cycle is ‘stolen’ from the current CPU

activity. A PEC service is a single byte or word

data transfer between any two memory locations

with an additional increment of either the PEC

source or the destination pointer. An individual

PEC transfer counter is decremented for each

PEC service, except for the continuous transfer

mode. When this counter reaches zero, a stan-

dard interrupt is performed to the corresponding

source related vector location. PEC services are

suited to, for example, the transmission or recep-

tion of blocks of data. The ST10F163 has 8 PEC

channels, each of which offers fast inter-

rupt-driven data transfer capabilities.

A separate control register which contains an

interrupt request flag, an interrupt enable flag and

an interrupt priority bitfield, exists for each of the

possible interrupt sources. Via its related register,

each source can be programmed to one of sixteen

interrupt priority levels. Once having been

accepted by the CPU, an interrupt service can

only be interrupted by a higher prioritized service

request. For the standard interrupt processing,

each of the possible interrupt sources has a dedi-

cated vector location.

Fast external interrupt inputs are provided to ser-

vice external interrupts with high precision

requirements. These fast interrupt inputs, feature

programmable edge detection (rising edge, falling

edge or both edges).

Software interrupts are supported by means of the

‘TRAP’ instruction in combination with an individ-

ual trap (interrupt) number.

Table 6 shows all of the possible ST10F163 inter-

rupt sources and the corresponding hard-

ware-related interrupt flags, vectors, vector

locations and trap (interrupt) numbers:

Table 6 : List of possible interrupt sources, flags, vector and trap numbers

Source of Interrupt or PEC

Service Request

External Interrupt 0

External Interrupt 1

External Interrupt 2

External Interrupt 3

External Interrupt 4

External Interrupt 5

External Interrupt 6

External Interrupt 7

GPT1 Timer 2

GPT1 Timer 3

GPT1 Timer 4

GPT2 Timer 5

GPT2 Timer 6

GPT2 CAPREL Register

ASC0 Transmit

ASC0 Transmit Buffer

ASC0 Receive

ASC0 Error

Request

Flag

CC8IR

CC9IR

CC10IR

CC11IR

CC12IR

CC13IR

CC14IR

CC15IR

T2IR

T3IR

T4IR

T5IR

T6IR

CRIR

S0TIR

S0TBIR

S0RIR

S0EIR

Enable

Flag

CC8IE

CC9IE

CC10IE

CC11IE

CC12IE

CC13IE

CC14IE

CC15IE

T2IE

T3IE

T4IE

T5IE

T6IE

CRIE

S0TIE

S0TBIE

S0RIE

S0EIE

Interrupt

Vector

CC8INT

CC9INT

CC10INT

CC11INT

CC12INT

CC13INT

CC14INT

CC15INT

T2INT

T3INT

T4INT

T5INT

T6INT

CRINT

S0TINT

S0TBINT

S0RINT

S0EINT

Vector

Location

00’0060h

00’0064h

00’0068h

00’006Ch

00’0070h

00’0074h

00’0078h

00’007Ch

00’0088h

00’008Ch

00’0090h

00’0094h

00’0098h

00’009Ch

00’00A8h

00’011Ch

00’00ACh

00’00B0h

Trap

Number

18h

19h

1Ah

1Bh

1Ch

1Dh

1Eh

1Fh

22h

23h

24h

25h

26h

27h

2Ah

47h

2Bh

2Ch

18/58

Share Link: