Data Sheet
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
–40
–20
0
20
40
60
TEMPERATURE (°C)
80
100
Figure 13. Bipolar Zero Error vs. Temperature
–0.008
–0.009
–0.010
–0.011
–0.012
–0.013
–0.014
–0.015
–0.016
–40 –20
0
20
40
60
TEMPERATURE (°C)
80
100
Figure 14. Gain Error vs. Temperature
4.0
3.5 TA = 25°C
3.0
2.5
2.0
1.5
1.0
0.5
0
0
1
2
3
4
5
LOGIC INPUT VOLTAGE (V)
Figure 15. DICC vs. Logic Input Voltage
AD5763
2.0
AVDD = +5V
1.5
AVSS = –5V
TA = 25°C
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–8 –6 –4 –2
0
2
4
6
8 10
SOURCE/SINK CURRENT (mA)
Figure 16. Source and Sink Capability of Output Amplifier with Positive Full-
Scale Loaded
4
AVDD = +5V
3
AVSS = –5V
TA = 25°C
2
1
0
–1
–2
–3
–4
–10 –8 –6 –4 –2 0 2 4 6
SOURCE/SINK CURRENT (mA)
8 10
Figure 17. Source and Sink Capability of Output Amplifier with Negative Full-
Scale Loaded
1
CH1 1.25V
M1.00µs
CH1 –175mV
Figure 18. Positive Full-Scale Step
Rev. C | Page 13 of 28