AD5763CSUZ(RevC) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD5763CSUZ Datasheet PDF : 28 Pages
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AD5763
Data Sheet
FINE GAIN REGISTER
The fine gain register is addressed by setting the three REG bits to 100. The DAC address bits select with which DAC channel the data
transfer is to take place (see Table 9). The fine gain register is a 6-bit register and allows the user to adjust the gain of each DAC channel
by −32 LSB to +31 LSB in 1 LSB increments as shown in Table 15 and Table 16. The adjustment is made to both the positive full-scale and
negative full-scale points simultaneously, each point being adjusted by ½ of one step. The fine gain register coding is twos complement.
Table 15. Programming Fine Gain Register
REG2 REG1 REG0 A2
A1
A0
1
0
0
DAC address
DB15:DB6
Don’t care
DB5 DB4 DB3 DB2 DB1 DB0
FG5 FG4 FG3 FG2 FG1 FG0
Table 16. Fine Gain Register Options
Gain Adjustment
FG5
FG4
FG3
FG2
FG1
FG0
+31 LSB
0
1
1
1
1
1
+30 LSB
0
1
1
1
1
0
…
…
…
…
…
…
…
No Adjustment (Default)
0
0
0
0
0
0
…
…
…
…
…
…
…
−31 LSB
1
0
0
0
0
1
−32 LSB
1
0
0
0
0
0
OFFSET REGISTER
The offset register is addressed by setting the three REG bits to 101. The DAC address bits select with which DAC channel the data transfer is to
take place (see Table 9). The AD5763 offset register is an 8-bit register and allows the user to adjust the offset of each channel by −16 LSB
to +15.875 LSB in increments of â…› LSB as shown in Table 17 and Table 18. The offset register coding is twos complement.
Table 17. Programming the Offset Register
REG2 REG1 REG0 A2 A1 A0
1
0
1
DAC address
DB15:DB8
Don’t care
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
OF7 OF6 OF5 OF4 OF3 OF2 OF1 OF0
Table 18. Offset Register Options
Offset Adjustment
+15.875 LSB
+15.75 LSB
…
No Adjustment (Default)
…
−15.875 LSB
−16 LSB
OF7
OF6
OF5
OF4
OF3
OF2
OF1
OF0
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
0
…
…
…
…
…
…
…
…
0
0
0
0
0
0
0
0
…
…
…
…
…
…
…
…
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
Rev. C | Page 20 of 28
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