ADE3800SXL View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ADE3800SXL

Analog LCD Display Engine for XGA and SXGA Resolutions with Embedded LVDS and RSDS Transmitters

STMicroelectronics 

Register Description by Block

ADE3800

H Pulse

Composite

Sync

Extracted

VSync

Figure 7: VSync Up/Down Counter

V Pulse

up at 7/8

OK: good

threshold

BAD SYNC AREA

error

UP DOWN

UP

DOWN

if V Pulse width was too short for the chosen threshold

(counter reaches 3/4th but goes down before 7/8th is reached):

Bad sync bit SRT_VS_SEL[3] would be set

down at 1/8

Threshold

7/8

3/4

1/4

1/8

0

4.7 Input Sync Measurement (SMEAS)

The SMEAS block monitors input activity and measures input sync signals from all sources. All

unused and reserved bits return as zero. SMEAS operates in the crystal clock (xclk) domain.

Input Sync Functions:

● Activity Detection: detects input activity

● Measurement: measures sync period and width

4.7.1

Input Sync - Activity Detection

The activity block measures all sync sources in parallel. An active channel is defined as having a

programmable number of rising edges within a programmable number of xclk cycles (= sample

period). Activity limits are set per channel class: clkdiv1k and HSync; vsync. The activity results are

updated each sample period.

Software can select either:

● One shot: one time measurement

● Free Run: continuously running measurements

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