AT88SC1003-09PT View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT88SC1003-09PT

1K EEPROM–Security Logic with Three Application Zones

Atmel Corporation 

AT88SC1003

Figure 5. Inc/Read

tCLK

Address

CLK

I/O

tCL

tOH

tCH

tOH

tDV

Note: PGM and RST must both be low during a read cycle.

I/O should not be driven (except by the external pullup resistor).

Figure 6. Erase/Write

Read

Erase/Write

Read

Address An-1

An

An

An

tCHP

CLK

PGM

I/O

tSPR

tHPR

tDV

tDV

tOH

Valid

Output

tDS

tDH

Drive

"1" (Erase)

or "0" (Write)

Input

Valid

Output

An+1

Note:

During any erase or write operation, PGM must fall before the falling edge of CLK at the

end of tCHP (recommend a minimum setup time of 1 usec).

After the rising edge of PGM to initiate the erase/write operation, delay at least tDV (2

usec) before driving data on the I/O contact.

21

2035B–SMEM–08/03

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