AT88SC1003-09PT View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
AT88SC1003-09PT Datasheet PDF : 30 Pages
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Figure 13. Erase Operation Application Zone 3 (AZ3)
Reset
Read
Compare EZ3
(A)
Address Ax
A0
A1
A2
A
1535
A
1536
A
1537
A
1582
A
1583
RST
AT88SC1003
Erase
(B)
A
1584
CLK
I/O
DX
PGM
D0
D1
Output
CD
1536
CD
1537
Input
CD
1538
Input Output
1
Input
E3 flag
Note:
An = Internal Address, Dn = Read data (output), CDn = Compare data (input).
This diagram illustrates the protocol for setting the E3 flag in Security Level 2 (issuer fuse blown). Erase operations in Security
Level 1 within Application Zone 3 do not require setting of the E3 flag. In Security Level 1, an erase operation on any bit in Appli-
cation Zone 3 will erase the entire zone.
A = Compare sequence of EZ3. If the comparison is valid, the EZ3 flag is set to “1”, enabling erasure of AZ3.
B = If E3 is set to “1”, an erase operation on Bit 1584 will erase Bits 1024–1535 (AZ3). After the falling edge of CLK, the address
is incremented. The E3 flag will be reset to “0” when the reset function is executed, or when the address is incremented beyond
Address 1599.
27
2035B–SMEM–08/03
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