AT88SC1003-09PT View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT88SC1003-09PT

1K EEPROM–Security Logic with Three Application Zones

Atmel Corporation 

Figure 11. Erase Operation Application Zone 2 (AZ2) EC2 Function Disabled

Reset

Read

Compare EZ2

(A)

Address

Ax

A0

A1

A2

A735

A736 A737

A766

A767

AT88SC1003

Erase

(B)

A768

Read

(C)

(D)

A769

RST

CLK

I/O

DX

PGM

D0

D1

Output

CD736

CD737

CD767

Input

Input Output

1

Input

D768

Output

E2 flag

Note:

An = Internal Address, Dn = Read data (output), CDn = Compare data (input).

This diagram illustrates the protocol for setting the E2 flag in Security Level 2 (issuer fuse blown). Erase operations in Security

Level 1 within Application Zone 2 do not require setting of the E2 flag. In Security Level 1, an erase operation on any bit in Appli-

cation Zone 2 will erase the entire zone. EC2EN Fuse = “0” (disabled).

A = Compare sequence of EZ2. If the comparison is valid, the EZ2 flag is set to “1”, enabling erasure of AZ2.

B = If E2 is set to “1”, an erase operation on Bit 768 will erase Bits 480–735 (AZ2).

C = After the falling edge of CLK, the device will drive the I/O contact to the logic state of the existing data in Bit 768. The state

of this bit is not affected by the AZ2 erase operation.

D = After the falling edge of CLK, the address is incremented and the state of the next bit is driven on the I/O contact.

25

2035B–SMEM–08/03

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