ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATMEGA64L-8MI
Atmel Corporation
ATMEGA64L-8MI Datasheet PDF : 363 Pages
| |||
Timer/Counter Register –
TCNT0
Output Compare Register –
OCR0
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
Table 56.
Table 56. Clock Select Bit Description
CS02
CS01
CS00 Description
0
0
0
No clock source (Timer/counter stopped)
0
0
1
clkT0S/(No prescaling)
0
1
0
clkT0S/8 (From prescaler)
0
1
1
clkT0S/32 (From prescaler)
1
0
0
clkT0S/64 (From prescaler)
1
0
1
clkT0S/128 (From prescaler)
1
1
0
clkT0S/256 (From prescaler)
1
1
1
clkT0S/1024 (From prescaler)
Bit
Read/Write
Initial Value
7
R/W
0
6
5
4
3
2
1
0
TCNT0[7:0]
TCNT0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes)
the Compare Match on the following timer clock. Modifying the counter (TCNT0) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0
and the OCR0 Register.
Bit
Read/Write
Initial Value
7
R/W
0
6
5
4
3
2
1
0
OCR0[7:0]
OCR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
The Output Compare Register contains an 8-bit value that is continuously compared
with the counter value (TCNT0). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC0 pin.
104 ATmega64(L)
2490G–AVR–03/04
Share Link: 