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ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
ATMEGA64L-8MI Datasheet PDF : 363 Pages
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ATmega64(L)
Special Function IO Register –
SFIOR
Bit
7
6
5
4
3
2
1
0
TSM
–
–
–
ACME
PUD
PSR0 PSR321 SFIOR
Read/Write
R/W
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing TSM bit to one activates the Timer/Counter Synchronization mode. In this mode,
the value that is written to PSR0 and PSR321 bits is kept, hence keeping the corre-
sponding prescaler reset signals asserted. This ensures that the corresponding
Timer/Counters are halted and can be configured to the same value without the risk of
one of them advancing during configuration. When the TSM bit written zero, the PSR0
and PSR321 bits are cleared by hardware, and the Timer/Counters start counting
simultaneously.
• Bit 1 – PSR0: Prescaler Reset Timer/Counter0
When this bit is one, the Timer/Counter0 prescaler will be reset. The bit is normally
cleared immediately by hardware. If this bit is written when Timer/Counter0 is operating
in Asynchronous mode, the bit will remain one until the prescaler has been reset. The bit
will not be cleared by hardware if the TSM bit is set.
2490G–AVR–03/04
109

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