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ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation

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Description
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ATMEGA64L-8MI Datasheet PDF : 363 Pages
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Figure 143. Mapping Between BS1, BS2 and the Fuse and Lock Bits during Read
Fuse Low Byte
0
Extended Fuse Byte
1
BS2
0
DATA
Lock Bits
Fuse High Byte
BS2
1
0
BS1
1
Reading the Signature Bytes
The algorithm for reading the Signature bytes is as follows (refer to “Programming the
Flash” for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte (0x00 - 0x02).
3. Set OE to “0”, and BS1 to “0”. The selected Signature byte can now be read at
DATA.
4. Set OE to “1”.
Reading the Calibration Byte
The algorithm for reading the Calibration bytes is as follows (refer to “Programming the
Flash” for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, (0x00 - 0x03).
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Parallel Programming
Characteristics
Figure 144. Parallel Programming Timing, Including some General Timing
Requirements
XTAL1
Data & Contol
(DATA, XA0/1, BS1, BS2)
PAGEL
WR
RDY/BSY
t DVXH
t XHXL
t XLWL
t XLDX
t BVPH
t PHPL
t PLBX t BVWL
t PLWL
t WL WH
WLRL
t WLBX
t WLRH
304 ATmega64(L)
2490G–AVR–03/04

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