C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
20.1. Capture/Compare Modules
Each module can be configured to operate independently in one of four operation modes: Edge-triggered Capture,
Software Timer, High Speed Output, or Pulse Width Modulator. Each module has Special Function Registers
(SFRs) associated with it in the CIP-51 system controller. These registers are used to exchange data with a module
and configure the module’s mode of operation.
Table 20.1 summarizes the bit settings in the PCA0CPMn registers used to place the PCA capture/compare modules
into different operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module’s CCFn
interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are recognized. PCA0
interrupts are globally enabled by setting the EA bit (IE.7) and the EPCA0 bit (EIE1.3) to logic 1. See Figure 20.2
for details on the PCA interrupt configuration.
Table 20.1. PCA0CPM Register Settings for PCA Capture/Compare Modules
ECOM CAPP
X
1
CAPN
0
MAT
0
X
0
1
0
X
1
1
0
1
0
0
1
1
0
0
1
1
0
0
X
X = Don’t Care
TOG
0
0
0
0
1
0
PWM
0
0
0
0
0
1
ECCF
X
X
X
X
X
X
Operation Mode
Capture triggered by positive edge on
CEXn
Capture triggered by negative edge on
CEXn
Capture triggered by transition on CEXn
Software Timer
High Speed Output
Pulse Width Modulator
Figure 20.2. PCA Interrupt Block Diagram
(for n = 0 to 4)
PCA0CPMn
ECCMT P E
CA A AOWC
OPP TGMC
MPN n n n F
nnn
n
PCA0CN
CC CCCCC
FR CCCCC
FFFFF
43210
PCA0MD
C
CCE
I
PPC
D
SSF
L
10
PCA Counter/
0
Timer Overflow
1
PCA Module 0
PCA Module 1
PCA Module 2
PCA Module 3
PCA Module 4
ECCF0
0
1
ECCF1
0
1
ECCF2
0
1
ECCF3
0
1
ECCF4
0
1
EPCA0
(EIE1.3)
EA
(IE.7)
0
1
0 Interrupt
Priority
1
Decoder
155
Rev. 1.7