C8051F002 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F002

Mixed-Signal 32KB ISP FLASH MCU Family

Silicon Laboratories 

C8051F000/1/2/5/6/7

C8051F010/1/2/5/6/7

20.1.4. Pulse Width Modulator Mode

All of the modules can be used independently to generate pulse width modulated (PWM) outputs on their respective

CEXn pin. The frequency of the output is dependent on the timebase for the PCA counter/timer. The duty cycle of

the PWM output signal is varied using the module’s PCA0CPLn capture/compare register. When the value in the

low byte of the PCA counter/timer (PCA0L) is equal to the value in PCA0CPLn, the output on the CEXn pin will

be set. When the count value in PCA0L overflows, the CEXn output will be reset (see Figure 20.6). Also, when

the counter/timer low byte (PCA0L) overflows from 0xFF to 0x00, PCA0CPLn is reloaded automatically with the

value stored in the PCA0CPHn without software intervention. It is good practice to write to PCA0CPHn instead of

PCA0CPLn to avoid glitches in the digital comparator. Setting the ECOMn and PWMn bits in the PCA0CPMn

register enables Pulse Width Modulator mode.

Figure 20.6. PCA PWM Mode Diagram

Write to

PCA0CPLn

0

ENB

Reset

Write to

PCA0CPHn ENB

1

PCA0CPHn

PCA0CPMn

ECCMT P E

CA A AOWC

OPP TGMC

MPN n n n F

nnn

n

00x0 x

PCA0CPLn

Enable

8-bit

Comparator

match S SET Q CEXn Crossbar

RQ

CLR

PCA Timebase

PCA0L

Overflow

Port I/O

Rev. 1.7

158

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