C8051F066 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F066

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F060/1/2/3/4/5/6/7

7. 10-Bit ADC (ADC2, C8051F060/1/2/3)

The ADC2 subsystem for the C8051F060/1/2/3 consists of an analog multiplexer (referred to as AMUX2),

and a 200 ksps, 10-bit successive-approximation-register ADC with integrated track-and-hold and pro-

grammable window detector (see block diagram in Figure 7.1). The AMUX2, data conversion modes, and

window detector can all be configured from within software via the Special Function Registers shown in

Figure 7.1. ADC2 operates in both Single-ended and Differential modes, and may be configured to mea-

sure any of the pins on Port 1, or the Temperature Sensor output. The ADC2 subsystem is enabled only

when the AD2EN bit in the ADC2 Control register (ADC2CN) is set to logic 1. The ADC2 subsystem is in

low power shutdown when this bit is logic 0.

AIN2.0

AIN2.1

AIN2.2

AIN2.3

AIN2.4

AIN2.5

AIN2.6

AIN2.7

ADC2GTH

Figure 7.1. ADC2 Functional Block Diagram

ADC2GTL

ADC2LTH

ADC2LTL

20

AV+

AD2EN

Comb.

Logic

10

9-to-1

AMUX

(SE or

DIFF)

10-Bit

SAR

10

ADC

AD2WINT

TEMP

SENSOR

AGND

00

Start Conversion 01

10

11

AD2BUSY (W)

Timer 3 Overflow

CNVSTR2

Timer 2 Overflow

AMX2CF

AMX2SL

ADC2CF

ADC2CN

Rev. 1.2

87

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