Reset
8
Reset
M25PE80
Driving Reset (Reset) Low while an internal operation is in progress will affect this operation
(write, program or erase cycle) and data may be lost.
All the Lock bits are reset to 0 after a Reset Low pulse.
Table 15 shows the status of the device after a Reset Low pulse.
Table 15. Device status after a Reset Low pulse
Conditions:
Reset pulse occurred
Lock bits status
Internal logic
status
Addressed data
While decoding an instruction(1): WREN,
WRDI, RDID, RDSR, READ, RDLR,
Fast_Read, WRLR, PW, PP, PE, SE, BE,
SSE, DP, RDP
Reset to 0 Same as POR Not significant
Under completion of an Erase or Program
cycle of a PW, PP, PE, SSE, SE, BE
operation
Reset to 0
Equivalent to Addressed data
POR
could be modified
Under completion of a WRSR operation
Device deselected (S High) and in Standby
mode
Reset to 0
Reset to 0
Equivalent to Write is correctly
POR (after tW) completed
Same as POR Not significant
1. S remains Low while Reset is Low.
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